#200580222_EN-1
tem, digital-, analog & firmware design, to design verification, and physical design teams which will support your daily work. Your work will not be limited to design. It will cover end-to-end responsibility across the project lifecycle for the IPs developed from concept to design, verification, integration, silicon validation, and finally, in-field operation.
Minimum Qualifications
Experienced with designing low-power customized hardware for digital signal processing. Understanding of signal processing principles. Abstract modeling skills for synthesis and simulation using modern modeling language.(Verilog / System Verilog).
Proven experience in multiple sophisticated ASIC or FPGA designs, spanning from concept to productization.
Hands-on experience with digital logic design and quality checks such as Lint and CDC/RDC.
Proficient in using (System)Verilog, the ability to analyze RTL/Netlist designs, and outstanding debugging skills to tackle technical challenges.
Familiar with day-to-day usage of scripting languages (e.g. TCL, Python, Perl, shell), Linux and revision control systems (e.g. Perforce), database management, and releases.
Passion for owning/driving design topics using well-defined metrics, a strong initiative, and ownership of responsibilities, productive, and able to meet daring deadlines.
Very good interpersonal skills, and ability to communicate abstract concepts to different stakeholders. Excellent problem-solving skills and the ability to find effective technical solutions between partners in RTL design, Firmware, System Engineering, Power, and Physical-Design teams.
English language proficiency is a requirement for this position.
Preferred Qualifications