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n Physical Design? Do you have strong track record with recent successful tape-outs in deep sub-micron technology? As SoC Digital Physical Design Engineer, you will take part in the large scale SoC physical design cycle from netlist to tape-out, including full flow of back-end implementation and verification always meeting schedule and design goals. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products? Join Us!
Description
Minimum Qualifications
You hold a MSEE or equivalent strong experience.
English language fluency (written and verbal).
We will be counting on your expertise and hands on experience with one of the Place & Route ('PnR') tools available today (Synopsys / Cadence), and having understanding of their capabilities and underlying algorithms.
You are familiar with hierarchical design approach, top-down design, and timing and physical convergence.
You are demonstrating in-depth understanding of static-timing analysis, extensive know-how in clock/power distribution and analysis, as well as RC extraction and correlation.
You have experience with SoC practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration.
You can do scripting and programming using several of the following: Perl, TCL and Make.
Your communication skills are excellent, and like the rest of us here at Apple you love working in open and multi-cultural environment.
Preferred Qualifications