Mixed-Signal Behavioral Modeling Engineer

cutting edge of the behavioral model field.

Description

In this role, you will be responsible for writing functional models of custom mixed-signal circuits in SystemVerilog with the right amount of detail, while also incorporating non-idealities. You will collaborate with circuit design teams to understand details of custom circuits, and with DV teams to craft hooks into the models for effective verification. You will analyze data provided by the circuit team in Python/MATLAB for fitting into the model and analyze the performance of the resulting model by profiling. You will run simulations and formal equivalence tools to ensure that the model matches closely with the custom circuits. You will work with other experts in this domain to enhance modeling methodology, improve functional coverage, optimize modeling flows and enable new tools to identify custom circuit issues.

Preferred Qualifications

Excellent knowledge of digital logic gates, clocking and state elements

Excellent knowledge of writing behavioral code in SystemVerilog

Solid understanding of logic and behavioral simulations

Ability to read custom circuit schematics and understand functionality

Good familiarity with circuit elements and functionality of mixed-signal blocks such as PLLs/DLLs/SERDES/Sensors/Data-converters

Good understanding of SPICE circuit simulations, and SystemVerilog/SPICE co-simulations

Good understanding of timing synchronous digital logic

Ability to write scripts in PERL/Python to automate repetitive tasks

Familiarity with the basics of digital signal processing and numerical analysis

Familiarity with the basics of probability and statistics

Minimum Qualifications

BS degree in technical discipline with minimum 10 years of relevant experience.

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