#200533792-11
p, verify, and use performance models for data-driven architectural exploration and validation.
Description
As a media-IP SoC performance architect, you will have responsibilities spanning all aspects of performance model development: planning model architecture, implementation, validation, performance studies, and RTL correlation. • Collaborate with system architecture and IP design teams to plan, implement, and validate a high-level performance model in C++. The performance model is minimal feature set to meet the model accuracy requirements yet modular and flexible enough to be adapted for new projects and architectural exploration. • Developing, analyzing, and presenting results of performance studies for different architectural and micro-architectural proposals from within the team as well as other architecture and design teams. • Develop custom tools for analyzing simulation results of these complex architectures to provide new insights into their behavior and propose innovative architectural changes to improve the performance. • Presenting performance study results to design teams and other architecture teams. • Validating the performance model against the specification and correlating the model with RTL.
Minimum Qualifications
Key Qualifications
Strong understanding of SoC, fabric, and memory system architectures
Strong software development and organizational skills especially with modular object-oriented SW architectures in C++
Proficiency in scripting languages such as Python & shell scripting
SoC architecture and micro-architectural knowledge, especially with regards to performance analysis
Experience with performance model development & analysis
Looking for people who are fast learners with strong problem solving and analytical skills
Excellent written and verbal communication skills for cross-functional collaboration and presentations
Education: MS/PhD in EE/CS/CE
5+ years of experience in performance modeling and architecture
Education & Experience
Additional Requirements