#200577123-2
line with minimum 3 years of relevant experience.
Preferred Qualifications
Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks
Deep understanding of adaptation and optimization algorithms
Deep understanding of communications and information theory
Proficiency in equalizers, timing recovery and system identification
Proficiency in DSP concepts and applications
Familiarity with mixed-signal modeling in Python/MATLAB/C/C++
Experience in system design and performance tradeoff
Familiarity with simulation tools for analog, digital, and/ or mixed-signal circuits
Familiarity with Machine Learning concepts
Experience in firmware or embedded software development is a plus
Additional Requirements
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