Intern Digital Verification Engineering

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• ·        Cadence Warsaw office/ Hybrid

  ·        Full time or Part time

  If you would like to gain first experience in SoC/IP Digital Verification - join our team for an internship! As Intern Verification Engineer you will have an opportunity to co-create complete virtual components from specification through the verification process up to providing a complex SoC design sign-off. Develop yourself by working with professionals!

  The Candidate Should Have:

  ·        BEng in Electronic / Micro-Electronic Engineering or Computer Science – or equivalent,

  ·        Basic knowledge of Hardware Description Languages (HDL),

  ·        Basic knowledge of Object Oriented Programming (OOP),

  ·        Good English skills.

  The advantage would be:

  ·        Experience in digital design,

  ·        Knowledge of methodology OVM/UVM,

  ·        Knowledge of SVA, Tcl/Tk,

  ·        or any other scripting language.

  We can offer you:

  ·        Flexible working hours which will allow you to combine education with gaining practical experience,

  ·        Competitive salary package adequate to competencies; based on internship / civil agreements that could be converted to regular contract of employment based on performance,

  ·        Work under the guidance of experienced team managers and designers,

  ·        Continuous professional development; trainings and seminars,

  ·        Possibility to cooperate with people from around the world in an expanding global organization,

  ·        Multisport cards,

  ·        Social Fund benefits,

  ·        Volunteer Time Off / 5 days

  ·        And much more, so do not hesitate to contact us.

We’re doing work that matters. Help us solve what others can’t.