#R46427
stems validation team. Candidate should possess strong communication skills with ability to manage multiple priorities on day-to-day basis. Ownership of tasks, ability to collaborate with remote teams located worldwide and clear communication of status, are must have attributes in this role.
Familiarity with the following items is a plus:
Serial link design techniques
Data converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniques
MATLAB or C to facilitate architecture development
Hardware description languages such as SystemVerilog or VerilogA for functional model development
Scripting languages such as Perl or Python for automation
Silicon validation testing knowledge and experience
Other requirements:
Excellent verbal and written communication skills
Mid-senior level- Senior level
MS/Ph.D. EE degree with 3+ years of analog design industry experience in advanced process technologies
The annual salary range for California is $131,600 to $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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