Principal IC Package Design Engineer

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You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day

Role: Principal IC Package Design Engineer
Experience: 10+ years-15 years Equivalent- Relevant
Education: BE/BTech or MTech in Electrical / Electronics Engineering Equivalent or Relavent

Role Summary

We are seeking an experienced IC Package Design Engineer with strong expertise in flip-chip package design and IC-Package-PCB co-design, focusing on signal integrity (SI), power integrity (PI), and thermal optimization. The role requires close collaboration with cross-functional teams and customers to deliver optimized, cost-effective, and high-performance package solutions.

Key Responsibilities

• Lead flip-chip package design with a strong focus on SI/PI and thermal constraints.

• Drive IC-Package-PCB co-design, balancing performance, power, cost, technology, and thermal trade-offs.

• Collaborate closely with cross-functional teams and customers to define and deliver optimal end-to-end solutions.

• Support die floorplanning, IO placement and Perform bump definition, routing feasibility analysis, and optimization of Package stack-up, BGA ball map and PCB design interfaces

• Execute 2D/3D EM simulations and apply electromagnetic and transmission line theory to package design challenges.

• Extract and analyze S-parameters and RLGC models to ensure package compliance with SI/PI requirements.

• Validate package and PCB designs in the lab, correlating measurements with simulation results.

• Provide clear, concise program status updates to management, highlighting risks, issues, and mitigation plans.

• Drive process improvements, methodology development, innovation, and efficiency gains in package design flows.

• Mentor and support team members while contributing as an individual technical expert.

• Experience with various Cadence Allegro tools (APD/SIP, PCB Editor)

• Experience with various modeling tools (Cadence Sigrity PowerSI, ExtractIM, Clarity 3D)

• Experience in working with different DRAM protocols, DDR4/5, GDDR6/7, HBM3/4, LPDDR5/6

• Strong understanding of package cost vs. performance trade-offs

• Proven ability to work independently and in cross-functional teams

• Highly motivated, proactive, and eager to continuously acquire new skills

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