#R50360
nuous improvement.
Required Qualifications:
Solid background in functional verification fundamentals.
Experience in:
Strong SystemVerilog and UVM methodology expertise.
Prior digital verification experience in serial bus multiprotocol PHY IPs (UCIE or SerDes IPs is preferred)
B.E/B.Tech/M.E/M.Tech with 10+ years of experience
Good to Have (Not Mandatory):
We're doing work that matters. Help us solve what others can't.