Lead Hardware Design and Validation Engineer

g.

• Designing mixed signal circuits using microcontrollers, FPGA, ADC, DAC, Multiplexer, OPAMPs & discrete components etc.

• Component selection, circuit design, design calculations, schematic entry, coordinating with layout Engineer, DFR, DFM, coordinating with manufacturing to produce PWA's.

• Designing circuit boards for meeting product safety .EMI-EMC requirements.

• Preparing detailed design document, testing hardware prototypes (using Lab Equipment's like DMM, Oscilloscopes, Function generators etc.), analyzing results and test report.

• Troubleshoot and resolve defects and failures during production builds

• Perform signal integrity analysis along with layout engineer.

• Validate the design from functional, thermal and precompliance view.

• Support cost-out opportunities

• Participate in organizational initiatives

Qualifications/Requirements

• Bachelor / Master in Electronics, Electronics & communication Engineering or equivalent.

• 7-10 years of experience in Mixed signal circuit design, system level analysis, Product Development life cycle including system and Sub-system Design. Design for Manufacturability & Reliability, Technical Regulations, and standards

• Hands on experience in conducting test validation, EMI-EMC (CS, EFT, Surge, RS, RE, ESD).

• Proven analytical and organizational ability.

• Strong interpersonal and leadership skills.

• Strong oral and written communication skills.

• Effective problem identification and solution skills.

• Ability to Mentor and effective work in Cross-functional teams.

Desired Characteristics

• Experience of Designing Digital Electronics, high speed design, Analog and mixed signal design, Dealing with design life cycle.

• Experience in high end PCBA assembly processes.

• Proficiency in ECAD suite of tools from Cadence.

• Expertise in Signal Integrity and simulations

• Deep knowledge of compliance requirements.

• Experience in Agile methodology.

Additional Information

Relocation Assistance Provided: Yes