ASIC Power Architect, Devices and Services

Minimum qualifications:

• Bachelor's degree in Electrical Engineering or equivalent practical experience.

• 5 years of experience in power management or power design/methodology.

• Experience with ASIC power methodology.

Preferred qualifications:

• Master's degree or PhD in Electronic/Computer Engineering with an emphasis on computer architecture, performance, or power analysis.
• Experience with power modeling, estimation, defining power goals, power management IP/sensors, techniques for power/voltage domain design, droop detection/mitigation, and/or Voltage Frequency Scaling.
• Experience with modeling/validation in virtual prototyping and TLM environments, algorithmic development, and/or prototyping software for power management.
• Knowledge of software/architectural design decisions on power and thermal behavior of the system (e.g., thermal/peak power mitigation).

About the job

Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Define power requirements for an ASIC to optimize Power Performance Area (PPA) under peak current and thermal constraints.
• Define power goals, identify power scenarios, and track IP power.
• Perform algorithm development, modeling, and software prototyping of power control features.
• Conduct post-silicon characterization and productization of power features and mitigation strategies.
• Drive power performance trade-off analysis for engineering reviews and product roadmap decisions.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.