The Line Manager will be expected to manage shiftly loop operations to meet OTF (Former AZFSM) quality and output goals.
The Line Manager will be responsible for but not limited to:
- Strategic WIP (Work in Progress) management of critical q time loops across two buildings. (F12, F32)
- Developing plans to optimize loop performance and partner with Manufacturing Engineers to implement plans.
- Coordinating preventive maintenances (PMs), downtime, tool reservations (including factory warmdowns) through strong communication and partnership with the loop modules and ROC.
- Gathering tool status and determining release strategy (tactical 12 hr plans)
- Documenting/understanding utilization gaps for loop tools and systematically driving learnings into the modules/ROC
- Understanding root cause for lots missing Queue Time goals and systematically driving learnings into the modules/ROC
- Working with IMT and Module GLs (Group leads) on taking tools down in a controlled manner (tracers)
The ideal candidate should exhibit the following behavioral traits:
- Excellent listening, written and verbal communication, tolerance of ambiguity, and commitment to task.
- Excellent negotiator and skilled at partnering with other groups to solve problems and drive solutions.
- Comfortable working in a high performing team culture which includes: setting high expectations, driving accountability to those expectations with a high sense of urgency, role modeling the desired culture, leading a team to produce results.
This position is for Compress Work Week Shift 6: (nights backend) PM-AM Wed-Sat and alternating Saturday night
You must possess the below minimum qualifications to be initially considered for this position. Qualifications listed as preferred or additional will be considered a plus factor for applicants.
- Candidate must possess a Bachelors Degree in Engineering or related field of study.
- 3+ years of experience in a semiconductor environment as: process engineering, fab automation, manufacturing operations.
- At the Bachelors level the candidate must possess the unrestricted right to work in the US. This U.S. position is open to U.S. Workers Only. A U.S. Worker is someone who is either a U.S. Citizen, U.S. National, U.S. Lawful Permanent Resident, or a person granted Refugee or Asylum status by the U.S. Government. Intel will not sponsor a foreign national for this position.
- Manufacturing and Industrial Engineering degrees will be preferred.
- Wafer fab facility knowledge.
- Knowledge MES300.
- Knowledge of data mining or troubleshooting.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....