Principal / Senior Principal Digital Engineer (No Clearance Required to Start - Up to $20K Sign-on Bonus)

Engineer for the testing of digital subsystems and products. Northrop Grumman PGS is a leading global supplier of Space systems. The Digital Technology department develops subsystems and products delivering advanced operational capabilities on schedule and under budget. In this position the I&T Engineer will perform integration and test activities on advanced digital subsystems used in radar, Electro Optical, Electronic Warfare and other sensor and processing applications.

The selected candidate will perform integration & test of digital subsystems and products. The candidate must have good communication skills, strong interpersonal skills, and demonstrated ability to work in a multi-discipline team. This position will support our Remote Sensing Program (RSP) Business Unit in Linthicum, MD.

Typical Responsibilities of a Digital I&T Engineer:

• Develop I&T Verification and Validation plans of processors, FPGA logic designs, and other digital logic circuits based on compliance requirements, and supporting validation at the product, component and system levels
• Provide or present I&T tests and/or plans, activities or status at program technical reviews or other technical meetings.
• Design, develop, creation and modification of EGSE required for I&T activities.
• Test, troubleshoot and problem resolution of digital hardware
• Lead and direct engineering teams during integration & test of digital subsystems and products
• Design, develop, creation and modification of test scripts utilizing (FPGAs)Xilinx and Microchip FPGAs
• Assist Integrated Product team lead with I&T schedule development, resources requirements and risk management
• Work with members of multi-functional teams to develop innovative solutions
• Clear and effective communication to cross-functional team members
• Documentation of test procedures and reports
• Interpret & influence higher level system I&T requirements
• Document I&T specifications for internal and external development teams
• Evaluate and mitigate technical risk of I&T system requirements and implementations

The selected candidates will perform in a fast-paced work environment with high expectations, significantly diverse assignments, and collaborative/team settings. The selected candidates are expected to be self-motivated, highly-organized, and detail oriented and possess effective verbal and written communication skills.

Basic Qualifications - Principal Digital I&T Engineer:

• Bachelor's Degree in Engineering or STEM-related discipline with 5 years of experience, Master's Degree and 3 years of experience, or https://Ph.D. and 0 years of experience.
• Experience with integration and test of digital logic circuits and subsystems
• Experience with the use of various FPGAs or the development of HDL (Verilog and VHDL) code within the corresponding IDE
• Must be able to obtain and maintain Top Secret/SCI security clearance

Basic Qualifications - Sr. Principal Digital I&T Engineer:

• Bachelor's Degree in Engineering or STEM-related discipline with 9 years of experience, Master's Degree and 7 years of experience, or https://Ph.D. and 4 years of experience.
• Experience with integration and test of digital logic circuits and subsystems
• Experience with the use of various FPGAs or the development of HDL (Verilog and VHDL) code within the corresponding IDE
• Must be able to obtain and maintain Top Secret/SCI security clearance

Preferred Qualifications:

• Active TS/SCI
• Experience as technical lead or other similar leadership role with demonstrated team building, organizational, and interpersonal skills
• Experience translating customer requirements and/or functional block diagrams into realized I&T test plans, procedures or test scripts.
• Fluency with developing and executing technical development plans
• Basic understanding of the Design, Manufacturing, and Test process
• Problem-solving experience in a team environment
• Digital test and Digital test requirements development experience
• Deep technical skills covering subsystem (box/LRU level), ASIC, FPGA and/or board design
• Embedded networking or high-speed protocols experience (Ethernet, PCIe, Interlaken, Infiniband, etc.)
• Interest in mentoring/teaching/growing junior engineers
• Some signal processing familiarity
• Experience with scripting languages such as TCL, Python or Perl
• Experience Integrating a system containing digital hardware, software and firmware
• Ability to multi-task and apply good time management

Salary Range: $109,900 - $164,900
Salary Range 2: $136,300 - $204,500

Employees may be eligible for a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit http://www.northropgrumman.com/EEO . https://U.S. Citizenship is required for most positions.