Verification Engineer - Memory Subsystem

NVIDIA

2.7

(9)

Bengaluru, India

#JR1990029

Position summary

verification methodologies

  • Work on the development of the verification infrastructure components (functional models/scoreboards/setting up new verification environments) for complex IPs using UVM methodology

  • Define the verification scope, develop testplans and work on functional coverage driven verification closure

  • Collaborate with architects, designers, software engineers, post-silicon teams across sites for innovative and timely solutions

What we need to see:

  • BS /MS in EE/ECE with 2+ years of experience

  • Exposure to verification closure of complex IP/sub-system for at least one project

  • Expertise in industry-standard verification flows like SV random testing, UVM, FV, coverage metrics, profiling tools, X prop, etc.

  • Strong coding skills in SV

  • Passion for debugging and good problem solving skills

  • Strong communication and interpersonal skills

Ways to stand out from the crowd:

  • Prior verification experience related to memory subsystem/network interconnect IPs is a huge plus

  • Familiarity with memory subsystem concepts such as cache coherency, memory consistency models, arbitration policies, high-speed IO protocols and/or on-chip interconnect

  • Familiar with scripting languages (Perl/python).

NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you are creative, curious and motivated, we want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.

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