our business, and our customers can achieve their full potential.
Siemens EDA has an opportunity for a Software Engineer to be part of a team working on research and development of software, algorithms, and techniques for formal verification of hardware, software and safety critical systems, contributing to Catapult Formal and High-Level Verification product lines in Siemens EDA. As a generalist, for a formal verification product line, the candidate will have a broad charter of contributing to various aspects of the tool flow, to take formal verification from research to broad usage. The candidate will report to the head of the Catapult Formal R&D team, in Calypto Systems Division in Siemens EDA. The division is responsible for industry leading tools for formal verification, high level synthesis, RTL power analysis and optimizations, and FPGA and ASIC synthesis.
This position is a part of the Atlas Graduate Program. Through this program, you will receive 12 months of technical and non-technical training, mentorship from Siemens EDA executives and world-class engineers, and learn what it is like to work as part of a company that is solving software challenges in the area of electronic design automation.
Siemens EDA is the longest standing Electronic Design Automation company in the world and over the last 30 years has amassed the finest technology portfolio in the business. Our software tools span the full breadth of semiconductor and electrical systems solutions including integrated circuit design and verification, PCB design & manufacturing solutions, cable harness design tools, and embedded software.
This software development position entails contributions to different areas of Calypto's Catapult Formal product, language frontends for C++, SystemC, and RTL, data flow analysis, netlist database and optimizations, solver orchestration and benchmarking, to debug flows utilizing industry standard waveform and testbench formats, and integration with third party tools for waveforms and simulation. The candidate will also interact with other product groups, field engineers, and customers to identify and develop unique formal verification solutions requirements that arise, such as C++ high level synthesis, CPU/FPU formal verification, RTL power optimizations, etc. Typical duties in this role involve:
• Software development, testing and code quality best practices
• Benchmarking and documentation
• Debugging of software, either in house, or in customer environments
• Developing solutions and methodologies for unique customer problems
• Communicating with peers, other teams, and customers
The candidate will also assist more senior engineers in designing, developing, modifying, and implementing software programming for products (both internal and external) with focus on surpassing customer expectations by achieving high quality and on time delivery. They will ensure the overall functional quality of the released product on all required platforms and mechanism, be able to work under close supervision, and have basic skills with moderate level of proficiency.
Required Knowledge/Skills, Education, and Experience:
• Technical degree (minimum BS) in Computer Science/Engineering or equivalent experience.
• The candidate should possess strong skills in algorithms and data structures, program/data flow analysis, computer arithmetic, etc.
• They should have strong knowledge in object-oriented programming (C++ preferred), scripting languages (Tcl preferred), and RTL (SystemVerilog and Verilog preferred, VHDL is a plus). Knowledge of SystemC is a plus.
• Experience working in a Linux environment.
• Strong desire to create high quality solutions (https://i.e. peer review code, write tests, update documentation, conform to the coding style guide, write monitoring checks).
• Self-motivated and able to work constructively and productively on a team, as well as independently, is essential.
• The position may involve occasional travel for internal meetings.
Preferred Knowledge/Skills, Education, and Experience:
• Understanding of formal verification of hardware/software
• Mathematical/analytical abilities
• High-level/behavioral synthesis
• Hardware design and verification
• RTL simulation tools
The salary range for this position is $https://30.96/hr to $https://55.72/hr and this role is eligible to earn another 3% in variable pay. Siemens offers a variety of health and wellness benefits to employees. Details regarding our benefits can be found here: https://www.benefitsquickstart.com . In addition, this position is eligible for time off in accordance with Company policies, including paid sick leave, paid parental leave, PTO (for non-exempt employees) or non-accrued flexible vacation (for exempt employees).
#Atlas #LI-EDA #DISW #LI-Hybrid
Equal Employment Opportunity Statement
Siemens is an Equal Opportunity and Affirmative Action Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to their race, color, creed, religion, national origin, citizenship status, ancestry, sex, age, physical or mental disability unrelated to ability, marital status, family responsibilities, pregnancy, genetic information, sexual orientation, gender expression, gender identity, transgender, sex stereotyping, order of protection status, protected veteran or military status, or an unfavorable discharge from military service, and other categories protected by federal, state or local law.
EEO is the Law
Applicants and employees are protected under Federal law from discrimination. To learn more, Click here .
Pay Transparency Non-Discrimination Provision
Siemens follows Executive Order 11246, including the Pay Transparency Nondiscrimination Provision. To learn more, Click here .
California Privacy Notice
California residents have the right to receive additional notices about their personal information. To learn more, click here .