Director of Product Engineering(Aprisa 3DIC)

ethodology development

• Hands on experience with 3DIC compiler or integrity tool

• Hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs.

• Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-lnnovus or Aprisa is a must.

• Tapeout experience of 2 or more projects is a must.

• Good understanding of timing, power and area trade-offs.

• Ability to pickup new flows, learn on the job and influence QOR is a must.

• Experience delivering designs with multiple voltage islands and top-level floorplanning & chip-assembly is a plus.

• TCL, Perl or Python scripting is a plus.

• Strong verbal and written communication skills; good presentation skills

• Good problem solving and debugging skills

Academic:

BE/B.Tech in Electronics and Communication (E&C) or Electrical or Telecom Engineering.

ME/M.Tech in VLSI or Microelectronics is a plus.

Job Location: Taiwan Office

Working at Siemens Software

Why us?

Working at Siemens Software means flexibility - Choosing between working at home and the office at other times is the norm here. We offer great benefits and rewards, as you'd expect from a world leader in industrial software.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.

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