#R53177
ur IC Signoff solutions
Conducting technical presentations, technical training, and product demonstrations, including development of customized presentations
Supporting technical evaluations and benchmarks
Help R&D and product engineers develop competitive and creative technical solutions
Requirements:
Complete Bachelors in Electrical, Electronics, System Engineering, computer science or related areas
MOS transistors, Physical verification flows ( i.e.. DRC, LVS & FILL), Parasitic extraction flows, IR Drop/Electromigration tools, Physical verification rule writing.
Excellent written and verbal communication skills
Interest in learning new technologies
Open to continued personal development to meet the evolving demands of the EDA industry
Experience in scripting languages such as Tcl/Perl/Python is a must
Team player with a positive attitude, willingness to offer and execute ideas and solutions to enhance processes within an evolving environment
Nice to have:
Industry Physical Design experience
Prior experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus or ICC, ICC2, DC or Primetime is highly desired
Experience with advanced nodes
Additional Job Details:
Employment category: CLT
Employment term: 40 hours/week.
Competitive benefits.
Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.
About Cadence Design Systems:
Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://https://www.cadence.com.
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