Design Verification Lead Engineer
Austin, TX
Why you should apply for a job to Cadence Design Systems:
Ranked as one of the Best Tech Companies for Women in 2022
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity
Parental leave is available for both paternity and maternity
Flexible work options available
88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.
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Position summary
regression environments (e.g., Jenkins) and ensure targets for code and functional coverage are met.
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Project Tracking: Responsible for technical alignment, project planning, and progress tracking for the verification lifecycle.
Required Qualifications:
- B.S/M.S in EEE with 5-8+ years of hands-on experience in VLSI design verification.
- Strong command of SystemVerilog Assertions (SVA), constraint randomization, and UVM.
- Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.
- Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.
We're doing work that matters. Help us solve what others can't.
Why you should apply for a job to Cadence Design Systems:
Ranked as one of the Best Tech Companies for Women in 2022
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity
Parental leave is available for both paternity and maternity
Flexible work options available
88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.