Lead Analog Design Engineer

Cadence Design Systems

4.4

Shanghai, China

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#R28336

horough understanding of jitter.

Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification (Cadence tool experience, lab test experience, and experience at 65nm and below technologies are a plus).

Position Requirements:

Master degree, major in Micro-Electronics, Electronic Engineering or equivalent
Ability to work effectively alone or as well as in a team.
Essential that the individual demonstrates strong communication, verbal and written
Requires good communication skills in English.

Desirable Qualifications:

Knowledge of one of key Analog IC design area:
High speed comparator; PLL's; Oscillators; Low Noise Design etc
Solid understanding of IC design technology and process/methodology in IC design solutions
Familiar with Cadence analog and mixed-signal EDA tools is a plus

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