Lead Design Engineer
Pune, India
Why you should apply for a job to Cadence Design Systems:
Ranked as one of the Best Tech Companies for Women in 2022
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity
Parental leave is available for both paternity and maternity
Flexible work options available
88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.
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Position summary
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Cross-Functional Collaboration: Partner with microarchitecture, RTL design, and software teams to align verification plans with ISA requirements.
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Mentorship: Provide technical direction and set the standard for quality and metric-driven verification (MDV) across global teams.
Required Qualifications:
- B.Tech/M.Tech in ECE with 4 to 8 years of experience in SoC/CPU/DSP verification.
- Deep expertise in SystemVerilog/UVM and C/C++ for architectural modeling.
- Experience with processor integration (e.g., RISC-V or ARM) and industry-standard protocols like AMBA/PCIe.
- Expertise in scripting (Perl, Python, or Tcl) for verification flow automation.
- Proven track record in verifying complex pipelines, memory subsystems, or ISA implementations.
We're doing work that matters. Help us solve what others can't.
Why you should apply for a job to Cadence Design Systems:
Ranked as one of the Best Tech Companies for Women in 2022
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity
Parental leave is available for both paternity and maternity
Flexible work options available
88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.