Principal Analog Design Engineer

of 10Gb/s and above.

• You will work as a part of an IP design team in a dynamic environment, taking an active role in design reviews, contributing to product definition, proposing and evaluating technical solutions, writing design specifications and test requirement documents, etc.

• The ideal candidate is a hands-on self-starter who is able to develop design specifications based on input from colleagues, customers, and industry standards, and who can effectively manage his or her own time to take projects to completion under supervision and guidance.

What we need to see/Who You Are

• 10+ years of working/research experience in high-speed CMOS SerDes design (CTLEs, TIAs, PLLs, DFEs, Drivers, FFEs, etc.), M.S in Electrical Engineering or related areas, Ph.D. is a plus

• Have experience designing in advanced CMOS technologies (7nm or below) at data rates of at least 10Gb/s and/or RF circuits operating at 5GHz or above

• Proficient with Cadence design environment and mixed-signal simulation (ADE, Layout, AMS), mixed-signal simulation (AMS), EM simulation (such as EMX)

• Good understanding of high-speed layout considerations, such as parasitics, crosstalk isolation, supply and bias distribution, etc.

• Working knowledge of theoretical and practical aspects of electro-magnetic structures including transmission lines, spiral inductors, resonant circuits, etc. (HFSS experience is a plus)

• Experience with precision analog and mixed-signal circuits is a plus

• Able to assume responsibility for a variety of technical tasks and to work independently

• Able to be hands-on at all levels of design, with the ability to verify, test, and characterize own designs

• Good communication and presentation skills

• Familiar with one of USB, DP, PCIe, UCIe, Ethernet, MIPI, HDMI, CXL, UALink or other industry standards. Multiple is a strong plus

We're doing work that matters. Help us solve what others can't.
We're doing work that matters. Help us solve what others can't.