Principal C++ Software Engineer - Protium Prototyping Platform

Cadence Design Systems

4.4

(53)

San Jose, CA

Why you should apply for a job to Cadence Design Systems:

  • 4.4/5 in overall job satisfaction
  • 4.4/5 in supportive management
  • 87% say women are treated fairly and equally to men
  • 89% would recommend this company to other women
  • 87% say the CEO supports gender diversity
  • Ratings are based on anonymous reviews by Fairygodboss members.
  • Parental leave is available for both paternity and maternity
  • Flexible work options available
  • 88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.
  • #R48202

    Position summary

    on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.

    • The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer success

    • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests

    • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

    Job Responsibility

    Protium is leading product in FPGA Emulation/Prototyping domain. This role is to provide essential Software innovations to improve Protium's Performance

    • Improve Performance of Protium System

    • Work includes writing efficient C++ code using optimized data structures.

    • Improving runtime by multi-threading & improving memory footprint by using efficient data structures & algorithm

    • Reading using timing annotations & incorporating in the Protium Compiler

    • Write Design Spec & Unit Tests

    Position Requirements/Qualifications:

    • Bachelor's in computer science, Electrical /Computer Engineering and a minimum of 4 years of related experience, or Masters and a minimum of 2 years of related experience, or PhD with thesis in a relevant area.

    • Working experience of EDA applications like synthesis/place and route/timing/optimizations

    • Excellent programming skills in C/C++, Object Oriented Programming, Multi-threaded programming

    • Knowledge Verilog or System Verilog and good understand digital circuits .

    The annual salary range for California is $131,600 to $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
    We're doing work that matters. Help us solve what others can't.

    Why you should apply for a job to Cadence Design Systems:

  • 4.4/5 in overall job satisfaction
  • 4.4/5 in supportive management
  • 87% say women are treated fairly and equally to men
  • 89% would recommend this company to other women
  • 87% say the CEO supports gender diversity
  • Ratings are based on anonymous reviews by Fairygodboss members.
  • Parental leave is available for both paternity and maternity
  • Flexible work options available
  • 88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.