#R48765
ck path. Effective clock gating can reduce data path logic depth and area, while simultaneously reducing clock tree and register power by preventing unnecessary clock toggles. There is a huge opportunity in this space to innovate and deliver significant value to our customers.
We are looking for a highly motivated software engineer to join us as a member of the R&D staff. You will be part of a team responsible for creating the innovative technologies required for technology leadership in this space. Development responsibilities include designing, developing, troubleshooting, debugging, and supporting the Genus software product. The team is based in Cambridge, UK, but working with many colleagues based globally.
Come join our experienced team of outstanding software developers!
This role is based in Cambridge.
Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success.
We're doing work that matters. Help us solve what others can't.