#R48117
equivalent, with a minimum of 4 years of industry experience in designing hardware and software systems.
Must have excellent communication skills with both written and spoken English.
C / C++ knowledge and hands-on experience.
RTL design knowledge using Verilog/SystemVerilog is required along with experience using RTL verification tools and flows.
Debugging experience.
Experience with team-wide collaboration tools and process.
Drive and ability to schedule workload and plan own tasks effectively.
Preferred:
We're doing work that matters. Help us solve what others can't.