Principal Solutions Engineer - Simulation (Safety Verification)

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Job Summary

As a senior member of the SVG Product Engineering team focused on safety solutions using Cadence Verification Safety Solution. You will partner closely with our top semiconductor customers to drive and build unique and innovative methodologies to implement cutting-edge designs. This involves working closely with the customers to understand their key challenges, develop efficient methodologies, help them leverage the latest tool capabilities, and guide them to achieve their Safety goals. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest designs that customers are working on, and able to influence at all levels, both internally and externally.

The position requires an experienced engineer passionate about new technology development, diagnosing verification problems systematically to deploy Safety Solution includes Xcelium Simulator, Jasper App, Verisium Manager. Worked to verify and debug cutting-edge SOCs, System ICs, and complex IPs. The position also requires knowledge of FMEDA, FMEA, FTA and Fault Simulations. Knowledge of Execution of Permanent and Transient Campaigns. Knowledge of Safety Report, Metrics and debug the coverage gaps.

This role also provides a front-row opportunity to participate in the evolution of key technology solutions to the most pressing design problems. In this role, you will have the opportunity to work with product teams to influence product direction with your timely feedback and observations.

This an excellent opportunity to work in a supportive and friendly work environment, where we are vested in each other's success, and are passionate about technology and innovation.

Job Responsibilities:

• Independently drive deployment of Functional Safety Solution at Customer Place

• Drive methodology and solution-oriented discussions with key stake holders

• Collaborate with worldwide AE teams and mentor junior team members

• Produce out-of-the-box solutions to customer problems using either tool capabilities or scripting techniques

• Narrow down complex problems to pointed tool issues for R&D resolution

• Work on improving Safety Solution in terms of QoR, TAT, Usability through deployment and discussions with customer

• Understand and define the customer requirement to create functional specifications for R&D development

Qualifications:

• BE/BTech/ME/MS/MTech in Electrical/Electronics

Experience and Technical Skills required**:**

• 7+ years of experience in Functional Verification, Safety Verification

• Knowledge of scripting languages & Flow development is a big plus

• Must have excellent debugging skills and ability to separate out the critical issues from trivial ones.

• Strong knowledge of simulation regression campaigns at IP level, Sub System Level, SoC Level

• Strong Knowledge of Safety IP's (CAN, Ethernet, ARM Cores, Interconnects) and Protocol's (AHB, AXI, APB, ACE, CHI)

• Strong knowledge on improving verification throughput by identifying and addressing compile and run time improvements for SoC verification flows is big plus

• Proven expertise in supporting customers (in HW / FW and SW based systems a plus)

• Technical expertise in RTL Design and functional verification using High Level Verification languages such as UVM (SystemVerilog or Specman "e") or C/C++ Capability with scripting in languages like Perl or TCL and shell scripting

Behavioral skills required:

• Must possess strong written, verbal and presentation skills

• Ability to establish a close working relationship with both customer peers and management

• Explore what's possible to get the job done, including creative use of unconventional solutions

• Work effectively across functions and geographies

• Push to raise the bar while always operating with integrity

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