#R44158
stomer designs.
Create testplans for verification of new features and execute them by creating new test cases requiring application of Design & DFT skills; Report bugs/enhancements in tool.
Collaborate with R&D and Product Engineering teams to review feature specifications, testplans & customer issues.
Debug issues reported by customers and suggest/implement measures to plug the gaps.
Review and resolve regression issues mentoring interns
Contribute to automation and quality improvement initiatives
Position Requirements
Candidate is expected to be:
B.E./B.Tech with 2 years of experience or M.E/M.Tech in Electronics/Electrical
Strong in Digital electronics, Verilog and Scripting (Perl/TCL).
Good in aptitude, problem-solving and communication skills a must.
Hands-on experience with DFT scan insertion and validation for scan, at-speed, MBIST and Boundary scan would be a plus
Keen & quick learner ready to learn new things with little guidance & take up challenging tasks
This position is in Product Validation Team of Cadence Modus DFT Software Solution.
Modus is a DFT (Design for Testability) software tool from Cadence used by leading chip design companies during DFT synthesis & ATPG (Automatic Test Pattern Generation) phase of chip design process
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