#R54411
forms** combining RTL, transactors, and virtual models for pre-silicon enablement.
Develop systemC and Multithreaded C++ models and Transactors necessary for bringup of software on a Hybrid platform.
Lead software bring-up on pre-silicon platforms (emulators / FPGA prototypes), including:
Drive end-to-end platform readiness from early boot (ROM, bootloaders) to OS stability.
Work closely with RTL, IP, firmware, validation, and customer teams to define requirements, align interfaces, and plan deliverables.
Debug complex software and platform issues using:
Identify root causes across HW/SW boundaries and propose robust architectural fixes.
Technical Expertise & Qualifications
Required Skills
Strong background in software architecture with proven experience building and debugging complex pre-silicon platforms.
Hands-on experience integrating RTL with virtual and hybrid environments.
Deep understanding of SoC architecture and system-level behavior across:
Expert knowledge of AMBA protocols and interconnects.
Proven experience working with and integrating key SoC IPs such as:
Strong proficiency in software debugging methodologies, including waveform-based debug and HW/SW co-debug.
Solid programming and scripting skills (C/C++, Python, shell scripting preferred).
Hands on experience on Multi-Threaded aspects, its challenges and tools to manage deadlocks
Preferred / Value-Add Skills
Experience with SystemC modeling and transaction-level modeling; ability to modify or develop models is a strong plus.
Prior experience working with emulators and FPGA-based platforms (Palladium, Protium, or similar).
Familiarity with GenAI / LLM-based workflows applied to EDA, debugging, automation, or productivity acceleration.
Knowledge of platform performance analysis and optimization.
Collaboration & Leadership Expectations
Mentoring junior engineers
Technical leadership
Team or project ownership
is highly valued.
Candidate Profile
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