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The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer success
Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.
Position Description
Cadence is looking for a Product Engineer to join the team behind Perspec, Cadence's Portable Stimulus solution used by leading semiconductor companies to solve complex SoC and system-level verification.
Focus: Deploying Portable Stimulus (PSS) in large SoC verification environments and solving complex generation and solver problems in collaboration with semiconductor customers and Cadence R&D.
Challenges.
This role sits at the intersection of verification methodology, system architecture, and EDA product engineering. You will work directly with advanced verification teams at major semiconductor companies to deploy Portable Stimulus (PSS) in real production environments and help drive the evolution of Perspec.
The work spans formal languages, simulation, emulation, virtual platforms, firmware-driven verification, and post-silicon reuse, and increasingly involves AI-assisted verification workflows.
What You Will Do
Work directly with semiconductor design and verification teams to deploy Portable Stimulus methodologies in complex SoC programs.
Help debug difficult generation and solver issues involving constraints, resources, execution ordering, and scenario realization.
Investigate real-world modeling challenges that arise in large system-level PSS environments.
Collaborate closely with Cadence R&D to diagnose tool issues, influence new features, and improve PSS standard
Help define and refine methodologies for scalable system-level verification.
Develop reference models, internal knowledge, and best practices used by both customers and Cadence field teams.
Support advanced system-level verification use cases including:
->software-driven verification
->device programming flows
->reuse between simulation, emulation, and post-silicon
->integration with virtual platforms and firmware environments
Contribute to emerging AI-assisted verification flows built around PSS models.
Required Background
12+ years of experience in SoC verification, validation, or verification methodology
Strong hands-on experience with SystemVerilog and UVM or embedded / bare metal environments
Solid understanding of constrained-random verification and system-level test generation
Experience debugging complex verification environments
Strong programming or scripting skills (C/C++/Python or similar)
Ability to work directly with engineering teams to solve difficult technical problems
Helpful Experience
Exposure to Portable Stimulus (PSS) or interest in learning it
Experience with Perspec or other PSS tools
Experience working with complex SoC subsystems and protocols such as PCIe, DDR, networking, or ARM-based SoCs
Experience with embedded software programming and bare-metal environments
Familiarity with emulation, virtual platforms, or post-silicon validation
Experience developing verification methodology or reusable verification libraries
Why This Role Is Interesting
Portable Stimulus is changing how system-level verification is done.
In this role you will work on real verification problems at scale, interacting with some of the most advanced verification teams in the industry and helping shape how hardware/software co-verification is done across simulation, emulation, and silicon.
If you enjoy deep technical problem solving, modeling complex systems, and working close to both customers and EDA tool development, this is a unique role.
Position Requirements
EDUCATION: MS in Electrical/Electronics/Computer Engineering with 12+ year experience or BE/BTech in Electrical/Computer/Electronics Engineering.
Behavioral skills required:
We're doing work that matters. Help us solve what others can't.