RFIC Design Engineer

Silicon Labs

Rennes, France

#20276

Position summary

s or signal chain

  • Design and simulation of the blocks like LNA, Mixers, filters, PLLs, ADC, DAC power amplifiers

  • Owning the complete analog front-end and delivering to SoC team

  • Guide the layout engineer and so the post-layout verification

Qualifications:

  • MS, MSc in Electrical Engineering and 4+ years of design experience

  • An advanced degree may reduce the minimum experience required.

  • Proficiency in Cadence Design Environment for Analog, Mixed-Signal and RF designs (Cadence Analog Artist, Cadence Virtuoso, SpectreRF, EMX, AFS etc.)

  • Advanced knowledge in signal processing

  • Prior experience in designing RF blocks for Analog/Digital PLLs such as: LC-based VCOs/DCOs, ring oscillators, frequency Dividers, TDCs, DTCs, etc.

  • Prior experience in designing RF blocks for Receivers and Transmitters such as: LNAs, active/passive mixers, power amplifiers, etc.

  • Familiarity of continuous time and/or discrete time (switched cap) analog blocks (high linearity and low-noise Filters, analog amplifier stages, voltage references, linear regulators, etc.)

  • Knowledge of mixed-signal verification methodologies

  • Knowledge of calibration circuits for compensating process/voltage/temperature variations

  • Prior Experience in silicon bring-up and characterization using digital, analog and RF test-equipment

  • Scripting in Python, Skill, Ocean, Perl, Unix Shell, etc.

Benefits & Perks

  • Meal vouchers for lunch

  • Employee Referral Program

  • Employee Wellness Program

  • Paid days for philanthropy/volunteering

  • Partial home working possibility

We prioritize the time for social activities, competitions, after work dinners and so much more!

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.