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h respect to deploy-ability and quality.
Job Qualifications:
Very good Knowledge about digital design using HDL languages (SystemVerilog and Verilog).
State of the art functional verification knowledge (UVM).
Good knowledge of Questa® Simulation flows is a plus.
Knowledge of protocol standards such as PCIe, DDR, Ethernet, and AMBA is a plus.
Good knowledge about advanced debug environments is a plus.
High ability to demonstrate good analysis and problem-solving skills.
Individuals with strong ability to learn and explore new technologies.
Have self-motivation and self-discipline as well as ability to work independently with minimal direction.
Excellent communication skills as well as the ability to work remotely within a global team environment.
Occasional travel may be required.
We're Siemens. A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow!
We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme and generous holiday allowance.
Siemens is an equal opportunities employer and do not discriminate unlawfully on any grounds. We are committed to providing access and equal opportunity.
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