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engage with experienced CPU and SoC designers in micro-architecture and RTL to assess the feasibility of ideas through modeling, refine ideas and model correlation, and seed new ideas. The role requires the analysis of single-threaded and multi-threaded workloads across existing and new product categories to identify bottlenecks and opportunities for improvement. We collaborate as a larger CPU architecture and performance team to maintain and improve the simulation environment to enable data- driven decisions and always look for ways to boost the productivity of the entire team.
Minimum Qualifications
BS degree
Knowledge of CPU and SOC architecture and micro-architecture
Familiarity with performance simulation environments
Coding skills, including object-oriented programming with C/C++
Experience in a scripting language such as Perl or Python
Preferred Qualifications
Knowledge of memory latency tolerance techniques or other aspects of CPU memory subsystem (i.e. prefetching, caching policies)
20+ years of relevant industry experience
MS or PhD in Electrical or Computer Engineering or Computer Science
Understanding of common data structures and algorithms
Familiarity with SIMD, vector, or accelerator architectures
Familiarity with MP performance
Comfortable in an environment of uncertainty and able to navigate through ambiguities
Experience in a research-driven environment
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