PHY RTL Design Engineer

ture Apple products. By leveraging state of art processes and tools, unique proprietary features and advanced architecture, the team aims to deliver best in class wireless connectivity solutions.","responsibilities":"Co-development of PHY layer algorithms, focusing on efficient implementation
Derive specifications and micro-architecture based on matlab/c system model
Architecting area and power efficient low latency designs with scalabilities and flexibilities
Work with algorithm and software team to ensure performance and power efficiency, from early algorithm definition stage to final DV delivery
Derive DV coverage requirements and work closely with verification team to ensure high quality and high level of coverage
Running tools to ensure lint-free and CDC/RDC clean design, including synthesis and timing constraints
Support pre-silicon validation on emulation platforms (e.g. FPGA, Palladium)
Support Post-Silicon and product level validation
Support optimisation and fine-tuning for spec compliance on silicon in an RF lab environment

Preferred Qualifications
Experience in low power SoC development - highly preferred
Experience in wireless communication protocols: knowledge of either BlueTooth or WLAN IEEE 802.11 protocol - highly preferred

Minimum Qualifications
3+ years of experience in the field of PHY/RTL development
Experience in signal processing development (modem, radar, image processing), including algorithms development and RTL implementation
Experience and proficiency with using MATLAB/C for algorithm development, modeling, and simulation
Good ability to work independently and in small teams
Bachelor's/Master's Degree in Electrical Engineering / Computer Engineering","internalDetails":null,"eeoContent":null