SoC Design Verification Engineer

experience for our customers across the world! You will be able to learn all aspects of a large-scale SoC, different types of SoC architecture, many high-speed layered protocols, the industry's standard methodologies on low-power architecture, outstanding DV methodology, verification on accelerated platforms, knowledge of cellular protocol, FW-HW interactions, complexities of multi-chip SoC debug architecture, etc.

Description

As a Design Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible for crafting and productizing innovative Cellular SoCs! This position requires someone comfortable with all areas of SoC design verification engineering. We are looking for someone who thrives in a dynamic multi-functional organization, is not afraid to debate ideas openly, and is flexible enough to shift within constantly evolving requirements.","responsibilities":"Understand and apply details of High-Efficiency SoC Architecture, standard SoC peripherals such as SPI, I2C, UART, Timer, high BW DMAs, memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory Controller Sub Systems, USB, PLL, power up, Secured Boot schemes.

Build coverage-driven verification plans from specifications, and review and refine them to achieve coverage targets.

Create IP level module and sub-system verification plan, TB, portable test benches, sequences, and test infrastructure.

Architect UVM-based highly reusable test benches and integrate sophisticated multi-instance VIPs, sub-system test benches, and test suites to SoC level, achieve targeted coverage, and work with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design.

Work closely with DV methodology architects to improve verification flow.

Preferred Qualifications

MSEE, MSCS or beyond is preferred.

Coursework in Computer Architecture, Networking Protocol.

Hands-on experience developing UVM-based testbenches in SystemVerilog, demonstrating applied understanding of object-oriented programming.

Experience in Digital Design.

Experience in Developing Reference Model of DUT and Verification using HVL.

Excellent communication, problem-solving skills, and the desire to seek diverse challenges.

Minimum Qualifications

Bachelors degree required

Demonstrated knowledge of object-oriented programming principles through coursework, research, or project experience in any OOP-based language (e.g., Python, C++, Java, or SystemVerilog).

Coursework in Digital Design.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $220,900, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.