Silicon Test Engineering Manager

Level Testing using Advantest SLT platform.

• Experience in SERDES, PCIe, DDR and Mixed-Signal circuits such as ADC, DAC, PLL, LDO, and their performance measurements.

• Experience in Design for test (DFT) techniques and structural tests such as Scan/ATPG, JTAG and memory BIST and familiarity with testing sensors such as PVT sensors, Temp sensors, etc.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will help develop and deploy a comprehensive test solution using Automatic Test Equipment (ATE) for high volume manufacturing at Floating Action Buttons, OSATs, etc. You'll help integrate SoC technologies into devices and facilitate ATE manufacturing testing of SoC to validate performance and screen out devices. You will own all aspects of testing and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will work with various groups to develop digital and mixed signal tests, automation methodologies, develop/support internal tools for test program generation, vector tracking, test program release, etc. You will also work on releasing cost effective production test solutions into mass production.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $177,000-$266,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .

Responsibilities

• Manage ATE test program development on UFLEX, 93K, or other ATE platforms.
• Develop High Volume manufacturing System Level Test (SLT) solution working with SLT Vendor and internal cross-functional teams.
• Perform IC Product bring-up, verification and characterization on ATE NPI production program release. Troubleshoot different failure modes and test coverage improvement on ATE.
• Manage new products Defective Parts per Million (DPPM) correlation, and product correlation between system and ATE.
• Support production including production program upgrade and release, lot disposition, extended test time reduction and yield improvement, RMA analysis, etc.