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Introduction  
The Analog circuit design engineer will play key role in developing IBM's next generation Ultra high speed serial  
IO link (HSS) interface for Cognitive, ML,DL, and data center applications using IBM main frame servers.  
The engineer will be involved in the design and development full custom analog circuits for ultra high speed  
32G/50G/112G IO link interface.  
  
Your Role and Responsibilities  
Design and development of key full custom analog blocks/sub blocks for Tx /Rx/PLL/CLK Distribution modules  
for 32G/50G/112G IO links and general purpose IO transceiver macros for PCIe, optical IO interfaces  
using industry's latest 7nm / 14nm FinFet technology.  
  
Required Technical and Professional Expertise  
  

-   The Analog circuit design engineer with experience in next generation Ultra high speed serial
-   IO link (HSS) interface for Cognitive, ML,DL, and data center applications. The engineer needs to have knowledge in the design and development full custom analog circuits for ultra high speed 32G/50G/112G IO link interfaces.

  
Preferred Technical and Professional Expertise  
  

-   Experience in 7 and 14 nm analog circuit design. Working on Cutting edge technology and HSS domain . Quick learner, deep circuit design knowledge, problem solving skills and good communication skills.Analog deisgn team and Analog Layout team.

Analog Circuit Designer

Regular employees who are birth mothers of newborn children receive Short-Term Disability (STD) for a six - to eight - week period (six weeks for regular deliveries and eight weeks for a Cesarean birth). Additionally, employees can request&nbsp;12 weeks paid bonding time off within 12 months of their child's birth or adoption. At manager discretion, paid parental bonding leave can be flexible and intermittent. The&nbsp;12 weeks of paid parental bonding leave is in addition to the STD time.

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Analog Circuit Designer

IBM

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