#JR1981364
ng methods to deliver performance on the industry's leading SOCs.
Develop test plans, tests, and verification methodologies to verify the microarchitecture and design.
Craft and build new test benches and testbench components in System Verilog, C and Python.
Work with architects, designers, and SW engineers to accomplish your tasks.
What we need to see:
B.Tech (or) M.Tech in Electronics or VLSI domain.
A proven track record with 2+ years of meaningful experience in Frontend ASIC verification.
Experience in crafting test bench environments for unit and system-level verification.
Strong coding skills in Perl, Python, or other industry-standard scripting languages.
Excellent debugging and analytical skills.
Have exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB, xprop).
Good understanding of RTL design (System Verilog) and Architecture.
Prior experience in Clocks/Resets/Power management verification is plus.
Experience in UVM is a plus.
Great written, oral, and interpersonal skills with the curiosity to work with a team on rare challenges
With great culture, competitive salaries, and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're a creative and autonomous engineer with a passion for technology, we want to hear from you!
#LI-Hybrid