#JR1983863
cuits designs such as ADC, DAC, PLL, and SerDes related design experience.
A teammate with good interpersonal skills
System-level architecture, timing budgets, specs, and analysis
In-depth understanding of deep submicron CMOS FinFET process and circuit design issues
Familiarity with device reliability, ESD, and Latch-Up requirements
Supervise layout development and understand all physical implementation aspects
Deep understanding of package substrate, board design, and power delivery.
Extensive experience in using advanced simulation tools
Hands on with Lab test and measurement equipment is a plus
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