Senior Mixed Signal Design Engineer

NVIDIA

2.7

(9)

Santa Clara, CA

#JR1970506

Position summary

t designs in the latest CMOS FinFET processes

  • Take designs through productization and be actively involved in all stages of development

  • Work with multi-functional teams to optimize the design

What we need to see from you:

  • MS/PhD in Electrical Engineering or equivalent experience

  • The candidate has 4+ years of well-rounded high-Speed DRAM (LPDDR4/5, DDR4/5, GDDR5/6, HBM2/3) or other SerDes interface related design experience.

  • In-depth understanding of deep submicron CMOS FinFET process and related circuit design issues

  • Familiarity with device reliability, ESD, and Latch-Up requirements

  • Possess an understanding of system-level timing budgets, specs, and analysis

  • Working Knowledge of the package substrate, board design, and power delivery is a plus.

  • Strong background of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre

  • Knowledge of Verilog, Nanotime, Matlab, or similar tools is a plus

  • Hands-on experience of silicon debug with Lab test and measurement equipment is a plus

  • A teammate with good interpersonal skills

The base salary range is 168,000 USD - 310,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.