#JR1990138
and SoC system qualification including feature checks, system stress at burnIn conditions, testing of large number of systems and debug of issues affecting any unit of the chip or software.
Perform validation of reliability stress hardware & software infrastructures and involve in System level High Temperature Operating Life (HTOL) reliability test.
Create scripts for automation and data parsing.
Deliver silicon aging result for product aging modeling.
Drive the silicon aging debug meeting, co-work with multi-function team till root cause it.
What we need to see:
BS/MS in Electrical Engineering or Physics
3~5 years overall experience in semiconductor reliability.
Good problem solving, collaboration, and communication skills. Capability of multi-tasking with priority.
Basic knowledge of frequency power thermal constraints and failure analysis techniques.
Engineering Experience in system-level debugging and Perf/Power/Speed/Reliability features in CPUs/GPUs/SOCs.
Familiarity with scripting languages like Python and/or JavaScript.
Good knowledge in board and system design considerations, experience in silicon design/bring up.
An understanding of PC architecture and various commonly used buses.
Must be a standout colleague and ready to work with global teams from diverse cultural backgrounds.
We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.