Principal Design Engineer

cus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.

• The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer success

• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests

• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

Job responsibilities:

BE/BTECH/ME/MTECH

Design Verification role for IP development team.

• Position is based in Bangalore/Noida, part of Cadence IP Group.
  Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)

• UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs.

• In addition to UVM functional verification, role could involve Formal verification of complex design modules.

• In addition to UVM functional verification, role could involve participating in Emulation qualification of design IPs.

• Understand design and produce detailed verification strategy and test plan.
  Self-starter and learner with passion for getting the job done on time with great quality.

• Strong problem solving, analytical and debug skills

• Excellent verbal and written communications skills

Clearly communicate project status, issues etc.
We're doing work that matters. Help us solve what others can't.