Sr Design Engineering Architect
Bengaluru, India
Why you should apply for a job to Cadence Design Systems:
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Flexible work options available
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Position summary
as a design and verification engineer, with a large portion of the recent work experience on RTL design and development.
- 6-16 years of core RTL Design experience using Verilog is a must.
- System Verilog experience and experience with UVM based environment usage / debugging is required.
- Architecture and design of CPU subsystem, including memory subsystem design, IO and cache subsystems is a must.
- PCIe/CXL/IDE experience is highly desirable. Prior experience in implementation of complex protocols is desirable.
- Prior experience in IP development teams would be an added advantage.
- Scripting knowledge is an advantage.
We're doing work that matters. Help us solve what others can't.
Why you should apply for a job to Cadence Design Systems:
Ranked as one of the Best Tech Companies for Women in 2022
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity
Parental leave is available for both paternity and maternity
Flexible work options available
88% of employees at Cadence say it is a great place to work compared to 57% of employees at a typical U.S.-based company.