Senior Analog Layout Engineering - Networking

NVIDIA

2.7

(9)

Multiple Locations (Remote)

#JR1991199

Position summary

implementation of high-speed opto-electrical analog layout in state-of-the-art nodes.

  • In close co-operation with the Design Team, review and analyze complex analog schematics for layout implementation.

  • Ensuring that all relevant parasitics are considered and ensuring quality by identifying and verifying device matching, IR drop and electro migration.

  • Potentially planning, ensuring stakeholder management and leading projects from start to finish.

What we need to see:

  • Dedication and drive to improve the success of the team.

  • Strong drive and ability to understand the problem and decide on solutions.

  • Systematic approach to planning and execution.

  • A Master's Degree or equivalent experience in electrical engineering or similar.

  • 5+ years' experience with Analog IC Layout is required.

Ways to stand out from the crowd:

  • Transistor level knowledge for SERDES circuits such as TIAs and Optical Drivers.

  • Experience with electro-optical ASIC layout.

  • Extensive SKILL experience

  • Proactively influence the chip design process by means of automatization and strategizing.

  • Previous responsibility for ramping up new process nodes.

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