Senior Layout Engineer

Doing:**

• Working closely with board design engineers, you'll perform PCB layout of high-speed/high-density value-conscious PCBs for the product engineering unit at NVIDIA, using Cadence PCB design tools Allegro 22.1 and Capture

• Your focus will be on the complete development of PCB layout, floor planning and detailed component placement, and constraint management, with a concept of topology and signal/trace integrity

• Be responsible for the design releases required generation of artwork files, ODB++, test reports, and electronic PCB documentation

• The designs you create will need to follow SI constraints

• Response on PCB manufacturer EQ/TQ

• Review Gerber/ODB++ files

• Creating PCB footprint

What We Need to See:

• Practical Electrical Engineer, or BSc in Electrical Engineering

• 5+ years of experience in high-speed PCB design

• Knowledge of PCB design and consideration for layout, routing, and timing constraints, DFM, DFA

• Deep understanding of High-Density Interconnect PCB layout and PCB Signal Integrity

• Proven ability to work with a team while taking personal responsibility for your own contributions

• Agility in changing focus as the needs of our effort evolve

• Excellent interpersonal and communication skills

Ways to stand out from the crowd:

• Experience in 8GHz+ range PCB design using back-drilling stacked/stager uVIA technology with minimum laminations.
• Building complex multi-layer HDI PCBs for very dense placement and routing
• DFT constraints in volume manufacturing