Senior Mask Layout Design Engineer

boratively and multi-functionally with a multi-disciplinary team of Photonics, CMOS, Electronics, and Systems engineers

• Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence tools

• You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

• Job duties will include floor planning, custom layout and verifying against design rules and schematics.

• Fill, post-processing, DRC mitigation, and foundry interactions

What we need to see:

• BS in Electrical Engineering (or equivalent experience)

• At least 5+ years of hands-on layout design experience

• Deep understanding of analog circuit layout concepts in submicron CMOS technologies. Validated experience with Cadence custom circuit design tools - particularly virtuoso

• Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield

• Ability to work optimally in a team, good interpersonal skills and positive energy.

• Proficiency in scripting languages like perl, python, skill etc. Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS

The base salary range is 104,000 USD - 230,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.