Senior Mixed Signal Designer Engineer

signs in deep submicron CMOS FinFET processes

• Take designs through productization and be involved in all stages of development

• Work with multi-functional teams to optimize the designs

What we need to see :

• BSEE or MSEE.

• Candidate must have 5+ years of well-rounded high Speed memory (LPDDR, DDR, GDDR, HBM) or SerDes related design experience.

• System level timing budgets, specs and analysis

• In-depth understanding of deep submicron CMOS FinFET process and circuit design issues

• Familiarity with device reliability, ESD and Latch-Up requirements

• Supervise layout development and understand all ESD/Latch-Up, reliability rules; Broad circuit design and implementation knowledge with significant depth

• Working Knowledge of package substrate, board design and power delivery is a plus. Working knowledge of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre

• Working knowledge of Verilog, Nanotime, Matlab is plus

• Hands on with Lab test and measurement equipment is a plus

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.