Verification Engineer

u will be working with architects, designers, pre and post silicon verification teams to accomplish your tasks.

What you'll be doing:

• Be responsible for verifying the design, architecture and micro-architecture of IP/Cluster/SOC using advanced verification methodologies

• Go through architecture/design specification and define the verification scope, come up with test plans, tests and verification infrastructure to verify complex designs

• Work with HW architects and designers to make the right verification strategy choices

• Use advanced verification methodologies like SV/UVM

What we need to see:

• B.Tech/M.Tech with 3+ years of experience in design verification

• Experience in verification of complex IPs, sub-systems, SOCs

• Expertise in HVL like System Verilog and verification methodologies like UVM

• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)

Ways to stand out from the crowd:

• Good debugging and analytical skills

• Scripting knowledge (Python/Perl/shell)

• Good communication skills and ability & desire to work as a team player

With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.