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Cadence Design Systems

Sr Principal Software Engineer

Mar 3, 2026• Bangalore, India

About us

Cadence is a pivotal leader in computational software.

★ 4.4 out of 5 · 53 reviews

  • Size: 10,000+ employees
  • Industry: Technology: Manufacturing
View company profile ›

Why you should apply for a job to Cadence Design Systems:

  • Ranked as one of the Best Technology Companies in 2024
  • 4.4/5 in overall job satisfaction
  • 4.4/5 in supportive management
  • 87% say women are treated fairly and equally to men
  • 89% would recommend this company to other women
  • 87% say the CEO supports gender diversity

Ratings are based on anonymous reviews by Fairygodboss members. See all reviews ›

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Position: Sr. Principal Software Engineer

Grade: T5

Experience: 12- 16 Years

Location: Bangalore/Noida

Job Responsibilities:

R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power.

This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don't know what the answers are when we start out!

Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills.

Job Qualifications:

BE/BTech/ME/MTech- Computer Science or others

Required Skills

The candidate should have hands-on experience in RTL Coding. The candidate should be able to

  • write, update, and optimize register-transfer level code using System Design Guide standards in VHDL or Verilog.
  • run functional simulations (using Xcelium), static timing analysis, and design-for-test checks to find bugs.
  • validate, test, and investigate performance/accuracy issues in the simulator.

Knowledge of Design-For-Test (DFT) and/or Memory-Built-In-Self-Test (MBIST) is a plus.

We're doing work that matters. Help us solve what others can't.

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Additional Information

  • Posted: Mar 3, 2026
Apply on company site
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