80 jobs for "Principal Test Engineer"

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Principal Analog IC Design Engineer, High Speed SerDes

At Cadence Design Systems - San Jose

Posted on Jul 31

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Principal Design Engineer

At Cadence Design Systems - Bangalore

Posted on Jun 23

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Principal Design Engineer

At Cadence Design Systems - Bangalore

Posted on Jun 8

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Principal Design Engineer

At Cadence Design Systems - Bangalore

Posted on Jun 8

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Principal Design Engineer

At Cadence Design Systems - Bangalore

Posted on Jun 4

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Sr Principal Design Engineer

At Cadence Design Systems - Bangalore

Posted on Feb 19

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Cadence Design Systems

Principal Analog IC Design Engineer, High Speed SerDes

San Jose$136,500 – $253,500Posted Aug 13, 2026

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Why you should apply for a job to Cadence Design Systems:

Ranked as one of the Best Technology Companies in 2024
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Candidate's background should include a minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
Working knowledge of a set of common SerDes standards and their electrical requirements is a plus.
Must have a thorough understanding of jitter and signal equalization techniques
Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators
Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment
Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification
Cadence tool experience, lab test experience, and design experience at >10Gbps and in < 28nm technologies are a plus
MS or PhD in EE

The annual salary range for California is $136,500 to $253,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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About Cadence Design Systems

Cadence is a pivotal leader in computational software.

Size: 10,000+ employees
Industry: Technology: Manufacturing

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