53 jobs for "Wireless PHY Systems Engineer"

Principal AE, Serdes Design IP

At Cadence Design Systems - San Jose

Posted on Oct 21

View job Apply on company site

PHY Design Verification Engineer

At Apple - San Francisco Bay Area

Posted on Oct 19

View job Apply on company site

Senior AE, SerDes Design IP

At Cadence Design Systems - San Jose

Posted on Oct 16

View job Apply on company site

WiFi FW Engineer

At Apple - Herzliya

Posted on Oct 16

View job Apply on company site

Wireless SoC Design Verification Engineer

At Apple - Remote / Flexible

Posted on Oct 16

View job Apply on company site

Principal AE, Serdes Design IP

At Cadence Design Systems - San Jose

Posted on Oct 14

View job Apply on company site

Wireless Testing Engineer

At Apple - Herzliya

Posted on Oct 16

View job Apply on company site

Cellular Modem Systems Engineering Program Manager

At Apple - Cupertino

Posted on Oct 16

View job Apply on company site

Software Engineer, Wireless Technologies & Ecosystems

At Apple - Sunnyvale

Posted on Oct 15

View job Apply on company site

PHY Design Verification Engineer

At Apple - San Francisco Bay Area

Posted on Oct 19

View job Apply on company site

PHY Design Verification Engineer

At Apple - San Francisco Bay Area

Posted on Oct 17

View job Apply on company site

PHY Design Verification Engineer

At Apple - San Francisco Bay Area

Posted on Oct 17

View job Apply on company site

PHY Design Verification Engineer

At Apple - San Francisco Bay Area

Posted on Oct 17

View job Apply on company site

Cadence Design Systems

Principal AE, Serdes Design IP

San Jose$127,400 – $236,600Posted 17 days ago

Apply on company site View full job

Why you should apply for a job to Cadence Design Systems:

Ranked as one of the Best Technology Companies in 2024
4.4/5 in overall job satisfaction
4.4/5 in supportive management
87% say women are treated fairly and equally to men
89% would recommend this company to other women
87% say the CEO supports gender diversity

Ratings are based on anonymous reviews by Fairygodboss members. See all reviews ›

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Title

Principal Applications Engineer, Serdes Design IP

Location: San Jose, CA

Job Description

The Cadence IP team develops industry leading IPs that enable customers in a variety of markets - from the endpoint to the edge to the cloud. At Cadence we're helping set the standard on IP products that get integrated in SoCs that power the world's Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to grow, no matter where you are in your career.

We are growing our Serdes Applications team and we are looking for smart, energetic, collaborative and creative people to help us lead the industry with our IP products. At Cadence, we believe in embracing diverse ideas and striving for excellence in all that we do. Do you want to make a difference and be challenged? Join the High-Performance Culture at Cadence.

As a Principal Applications Engineer, you will use your knowledge of different high-speed interface standards such as PCIe, CXL, Ethernet and USB to architect interface solutions for customers using Cadence Serdes IP and showcase the performance of the IP. You will also define internal processes and lead initiatives to improve team productivity and grow the IP business. This is a customer facing role that offers the benefit of both technical growth and business skill development. You will be part of the Technical Field Organization helping educate customers and providing solutions to them using our Serdes IP portfolio. Our serial interface PHY and controller IPs are used in data centers, mobile devices, automobiles and consumer devices.

Responsibilities include:

• Technical presales and configuration of High-Speed Interface IP, including PCIe, CXL and Ethernet PHY and Controllers

• Present Cadence's IP portfolio and capabilities to prospective customers

• Serve as a product expert in digital controller and PHY IPs and protocols

• Work closely with IP Sales staff, marketing and R&D teams to win opportunities

• Demonstrating IP Performance at industry events and to prospective customers

• Provide quick-turn product specific technical support to customers, field teams, architects and designers

• Write application notes and articles for internal and/or external publication

• Travel to customer sites may be required occasionally

Qualifications:

• BS in EE, CE or related equivalent with 15+ years of relevant work experience or MS in EE, CE or equivalent with 10+ years of relevant work experience

• Solid experience in one or more high speed interface protocols - PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G, 112G

• Strong knowledge of PHY and/or controllers for one or more high speed interface protocols

• Individual leadership and initiative to manage pre-sales accounts

• Excellent presentation skills and verbal/written communication skills is a must

Nice to have:

• Lab validation and demo setup skills

• Experience on high-speed interface controller and/or PHY verification

• Knowledge of AXI and PIPE interface protocols

• Working knowledge of high-speed interface PHY

The annual salary range for California is $127,400 to $236,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We're doing work that matters. Help us solve what others can't.

About Cadence Design Systems

Cadence is a pivotal leader in computational software.

Size: 10,000+ employees
Industry: Technology: Manufacturing

View company profile