8 jobs for "Principal Product Engineer - Memory IP"

Principal Product Engineer - Memory IP

At Cadence Design Systems - Nanjing

Posted on Aug 18

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Senior Principal Digital Design Engineer - Memory IP

At Cadence Design Systems - San Jose

Posted on Aug 26

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Principal Product Engineer - DIP

At Cadence Design Systems - Shanghai

Posted on Aug 7

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Principal Applied Research Engineer/Scientist, Siri Labs

At Apple - Cupertino

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Sr Principal Verification Engineer

At Cadence Design Systems - Shanghai

Posted on Aug 24

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Principal Design Engineer

At Cadence Design Systems - Remote / Flexible

Posted on Feb 24

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Principal Product Engineer

At Cadence Design Systems - Bangalore

Posted on Sep 10

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Principal Product Engineer

At Cadence Design Systems - Bangalore

Posted on Nov 28

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Cadence Design Systems

Principal Product Engineer - Memory IP

Nanjing, ChinaPosted Aug 18, 2026

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Primary Responsibilities:
○ Supporting pre-silicon integration, usage, and implementation of memory subsystem products
○ Helping with internal system integration and QA testing of memory subsystem products (Controller + PHY)
Analyzing and resolving complex subsystem application or implementation issues and providing
professional guidance to customers
○ Supporting various memory PHY and controller SOC integration reviews and implementation reviews
○ Assisting customers with RTL and gate-level simulations to verify functionality
○ Assisting customers with timing closure and other aspects of physical integration
Participating in development and refinement of product documentation and checklists for customer
applications
○ Supporting post-silicon bringup and production test activities for customers as needed
Enhancing customer experience by providing prompt, thorough, and technically accurate responses to
customer questions
○ Leveraging AI-powered tools and assistants to enhance productivity, improve decision making, and maintain
high-quality customer deliverables.
○Applying AI-powered analytics tools to extract insights, identify patterns, and generate actionable
recommendations from complex datasets

Position Requirements:
○ B.S Electrical/Computer Engineering (or similar degree) and 7+ years of overall experience -OR- M.S
Electrical/Computer Engineering (or similar degree) and 5+ years of overall experience
○ Experience working with DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6 or similar IPs
○ Verilog RTL design and gate level verification experience
○ Synthesis and static timing analysis experience (physical implementation/verification experience is a plus)
○ Familiarity with industry standard DFT flows and test methodologies.
○ Familiarity with package and board design
○ Ability to read schematics and participate in SI/PI reviews for customer board/package implementation

Preferred Qualifications
○ Experience with Memory PHY and DSP based architecture
○ Experience with embedded microcontroller FW
○ Background with scripting and applying AI solutions to daily workflows

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About Cadence Design Systems

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Size: 10,000+ employees
Industry: Technology: Manufacturing

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